In recent years, MRAM (Magnetoresistive Random Access Memory) has been proposed as a new memory device in which data is stored by utilizing the spin of electrons. In MRAM, multiple memory cells are arranged in an array configuration; and a magnetoresistive memory element and a transistor are provided in each of the memory cells. To increase the integration of the memory cells in MRAM, it is necessary to downscale the transistors while ensuring the prescribed on-state current.
On the other hand, Fin-type MOSFETs (hereinbelow called FinFETs) have been proposed to realize both higher integration and a larger on-state current for MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). In FinFETs, a fin having a protruding configuration extending in one direction is formed in the upper surface of a semiconductor substrate; and a gate electrode extending in another direction is provided to straddle the fin. Thereby, the outer circumference of the portion of the fin surrounded by the gate electrode is used as the channel region; and the channel width can be enlarged without increasing the element surface area.
Therefore, it is conceivable to use FinFETs as the transistors of MRAM to increase the integration of the memory cells of the MRAM. However, in such a case, it is unfortunately difficult to adjust the thresholds to the respective optimal values for the multiple types of transistors included in the MRAM.